FPGA Implementation of Double Precision Floating Point Adder/Subtractor / by Goh Siu Tiong..

Main Author: Goh Siu Tiong
Language:English
Published: INTI International College Penang Stage 3 B. Eng. Project..
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090 0 0 |a Nov 2014 (4)  
100 1 |a Goh Siu Tiong  
245 0 0 |a FPGA Implementation of Double Precision Floating Point Adder/Subtractor / by Goh Siu Tiong.. 
260 |a INTI International College Penang Stage 3 B. Eng. Project.. 
300 |a Binding books - Student Project.. 
500 |a Bachelor of Engineering (Hons) in Electrical & Electronics Engineering in collaboration with University of Bradford UK. 
500 |a Project Supervisor : Ms. Ng Bee Yee 
999 |a 6000000468  |b Book  |c Red Spot