APA Citation

Lee Wei Sheng. High speed multiplier using Vedic Mathematics approach in FPGA / by Lee Wei Sheng. INTI International College Penang Stage 3 B. Eng. Project.

Chicago Style Citation

Lee Wei Sheng. High Speed Multiplier Using Vedic Mathematics Approach in FPGA / By Lee Wei Sheng. INTI International College Penang Stage 3 B. Eng. Project.

MLA Citation

Lee Wei Sheng. High Speed Multiplier Using Vedic Mathematics Approach in FPGA / By Lee Wei Sheng. INTI International College Penang Stage 3 B. Eng. Project.

Warning: These citations may not always be 100% accurate.